UCLA researchers developed a scalable approach to fabricate high-speed (over 50Ghz) graphene transistors

posted Jun 18, 2011, 1:12 AM by Hatef Sadeghi
A research team from UCLA announce they have developed a scalable approach to fabricate high-speed graphene transistors. Back in September 2010, this team developed 300Ghz graphene transistors, making them using a nanowire as the self-aligned gate.
The new approach uses a dielectrophoresis assembly approach to precisely place nanowire gate arrays on large-area chemical vapor deposition–growth graphene (as opposed to mechanically peeled graphene flakes) to enable the rational fabrication of high-speed transistor arrays. This was made on a glass substrate. The new transistors have cut-off frequencies of over 50Ghz (typical graphene transistors made on silicon have cut-off frequencies of less then 10 Ghz)./p>
The team used these transistors to construct radio-frequency circuits functioning up to 10 GHz.

More info: http://newsroom.ucla.edu/portal/ucla/ucla-chemists-engineers-achieve-169811.aspx